Krste Asanovic

I am a Professor in the Computer Science Division of the EECS Department at the University of California, Berkeley. My main research areas are computer architecture , VLSI design, parallel programming and operating system design. I am Director of the ASPIRE lab tackling the challenge of improving computational efficiency now that transistor scaling is ending. ASPIRE builds upon the earlier success of the Par Lab, whose goal was to make parallel programming accessible to most programmers. I am also a member of the RISE Lab, Associate Director at the Berkeley Wireless Research Center, and hold a joint appointment with the Lawrence Berkeley National Laboratory. Previously at MIT, I led the SCALE group, investigating advanced architectures for energy-efficient high-performance computing. I am a co-founder at SiFive. |


Return of the Runtimes: Rethinking the Language Runtime System for the Cloud 3.0 Era

Sub-microsecond Adaptive Voltage Scaling in a 28nm FD-SOI Processor

Vector Processors for Energy-Efficient Embedded Systems

The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V

Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL

Reprogrammable Redundancy for Cache Vmin Reduction in a 28nm RISC-V Processor

Grail Quest: A New Proposal for Hardware-assisted Garbage Collection

Blog Posts

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