Open-source hardware based on the RISC-V ISA provides an opportunity to solve this problem, by running managed workloads on RISC-V systems in FPGA-based full-system simulation. This approach achieves both the accuracy and simulation speeds required for managed workloads, while enabling modification and design-space exploration for the underlying hardware.
A crucial requirement for this hardware-software research is a managed runtime that can be easily modified. The Jikes Research Virtual Machine (JikesRVM) is a Java Virtual Machine that was developed specifically for this purpose, and has become the gold standard in managed-language research. In this paper, we describe our experience of porting JikesRVM to the RISC-V infrastructure. We discuss why this combined setup is necessary, and how it enables hardware-software research for managed languages that was infeasible with previous infrastructure.
Published On: October 14, 2017
Presented At/In: 1st Workshop on Computer Architecture Research with RISC-V (CARRV '17), Boston, MA, October 2017